Senior Staff Digital IP Engineer
Germany - Dresden
Permanent
Job Title: Senior Staff Digital IP Engineer
Position: Full Time, Permanent
Location: Dresden, Germany
Salary Range: Negotiable
Responsibilities:
•As Digital IP owner, be the overall responsible throughout the IP lifecycle and collaborate cross-functionally
•Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications
•Implement complex digital blocks in SystemVerilog
•Create timing constraints and power intent files; perform linting, CDC and DFT checks to ensure high quality designs
•Run synthesis and power estimation to optimize RTL for better performance, power and area
•Support product teams in IP integration, chip bring-up and product qualification
•Work closely with different teams across the world on exciting solutions
Requirements:
•A University degree in Electrical Engineering, Computer Science or similar
•At least 6 years of experience in digital design for IP/SoC development
•Experience with JEDEC memory standards and AXI bus protocol
•Very good knowledge in SystemVerilog and basics in VHDL as well as scripting languages (e.g. python, tcl)
•Very good English, German is an advantage
Get in touch with jessica@microtech-global.com for more information on this role and similar opportunities
Position: Full Time, Permanent
Location: Dresden, Germany
Salary Range: Negotiable
Responsibilities:
•As Digital IP owner, be the overall responsible throughout the IP lifecycle and collaborate cross-functionally
•Work with IP Architects to define the microarchitecture of reusable digital modules based on IP specifications
•Implement complex digital blocks in SystemVerilog
•Create timing constraints and power intent files; perform linting, CDC and DFT checks to ensure high quality designs
•Run synthesis and power estimation to optimize RTL for better performance, power and area
•Support product teams in IP integration, chip bring-up and product qualification
•Work closely with different teams across the world on exciting solutions
Requirements:
•A University degree in Electrical Engineering, Computer Science or similar
•At least 6 years of experience in digital design for IP/SoC development
•Experience with JEDEC memory standards and AXI bus protocol
•Very good knowledge in SystemVerilog and basics in VHDL as well as scripting languages (e.g. python, tcl)
•Very good English, German is an advantage
Get in touch with jessica@microtech-global.com for more information on this role and similar opportunities
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