Senior Researcher - (Computing Architecture) - Switzerland
Switzerland - Switzerland
Permanent
We are looking for highly talented Senior Researchers for our new Computing Architecture Lab.
Responsibilities
Explore new computing workloads, accelerate services, and improve performance in this scenario, improve and give full play to the system computing power of next-generation chips, and build the core competitiveness of the computing power base.
Lead at least one of the following technological breakthroughs:
XPU microarchitecture innovation research
Be responsible for chip technology planning, SoC architecture innovation and design, and participate in the end-to-end chip R&D process.
Identify the latest technology trends and key technologies in the processor microarchitecture field, explore and innovate technical breakpoint at the SoC level.
Participate in the discussion and communication with global customers, capture the latest microarchitecture evolution and processor chip technology trends in the industry in a timely manner, and be responsible for the technology layout in the processor domain.
Requirements
PhD or MSc in computer science or area related to computer architecture, or equivalent research experience in industry
At least 3 years of relevant research experience in industry or academia
Proficiency in at least 3 of the following domains: processor microarchitecture, accelerator technology, and software and hardware collaborative performance optimization:
Processor microarchitecture: extensive experience in processor microarchitecture research and end-to-end development and design, in-depth understanding of processor SoC, familiar with chip technologies such as core, cache, NoC, and memory, and leading processor SoC design, feature design, and IP development are preferred.
Accelerator technologies: deep understanding of accelerator technologies and strong experience in innovation, design, and development of coprocessor design, neural network accelerator, FPGA accelerator, and ASIC accelerator design. Experience in FPGA chip design and development with a computing background and proficiency in the end-to-end development process of FPGA engineering. Experience in large-scale project delivery is preferred.
Software and hardware performance optimization: understand system software principles and existing mainstream acceleration technologies and ideas, and have rich experience in performance optimization, HPC/AI acceleration, software and hardware collaborative optimization, software architecture design, and productization.
Proficient in load characteristic analysis, modeling and simulation, and performance engineering. Familiar with the chip microarchitecture, have the capability and experience of analyzing the performance of chips from top to bottom, familiar with common profiling tools and performance engineering methodologies
Familiar with at least one software or hardware emulation tool, SystemC/Verilog programming experience, and be able to use chip verification and emulation tools to verify the design or performance of new features.
Excellent oral and written English.
Responsibilities
Explore new computing workloads, accelerate services, and improve performance in this scenario, improve and give full play to the system computing power of next-generation chips, and build the core competitiveness of the computing power base.
Lead at least one of the following technological breakthroughs:
XPU microarchitecture innovation research
Be responsible for chip technology planning, SoC architecture innovation and design, and participate in the end-to-end chip R&D process.
Identify the latest technology trends and key technologies in the processor microarchitecture field, explore and innovate technical breakpoint at the SoC level.
Participate in the discussion and communication with global customers, capture the latest microarchitecture evolution and processor chip technology trends in the industry in a timely manner, and be responsible for the technology layout in the processor domain.
Requirements
PhD or MSc in computer science or area related to computer architecture, or equivalent research experience in industry
At least 3 years of relevant research experience in industry or academia
Proficiency in at least 3 of the following domains: processor microarchitecture, accelerator technology, and software and hardware collaborative performance optimization:
Processor microarchitecture: extensive experience in processor microarchitecture research and end-to-end development and design, in-depth understanding of processor SoC, familiar with chip technologies such as core, cache, NoC, and memory, and leading processor SoC design, feature design, and IP development are preferred.
Accelerator technologies: deep understanding of accelerator technologies and strong experience in innovation, design, and development of coprocessor design, neural network accelerator, FPGA accelerator, and ASIC accelerator design. Experience in FPGA chip design and development with a computing background and proficiency in the end-to-end development process of FPGA engineering. Experience in large-scale project delivery is preferred.
Software and hardware performance optimization: understand system software principles and existing mainstream acceleration technologies and ideas, and have rich experience in performance optimization, HPC/AI acceleration, software and hardware collaborative optimization, software architecture design, and productization.
Proficient in load characteristic analysis, modeling and simulation, and performance engineering. Familiar with the chip microarchitecture, have the capability and experience of analyzing the performance of chips from top to bottom, familiar with common profiling tools and performance engineering methodologies
Familiar with at least one software or hardware emulation tool, SystemC/Verilog programming experience, and be able to use chip verification and emulation tools to verify the design or performance of new features.
Excellent oral and written English.
19003u0k
| Software & Artificial Intelligence: | CPU - Hardware |
