SIPI Engineer
France
Permanent
Negotiable
ROLE: SIPI Engineer
LOCATION: Paris, France
SALARY: Negotiable
DURATION: Permanent
Job Description:
• Responsible for Signal Integrity and Power Integrity simulations at feasibility, floor planning, post-layout phases of the SoC/package/PCB. Establish design and layout guidelines.
• Responsible for coordinating with systems team, IC/HW design team and layout team to identify aggressor/victims, generate test plans and resolve SI related issues
• Responsible for coordinating with IC/HW design team to collect power consumptions, designing/simulating the PDN (Power Delivery Network)
• Responsible for SI and timing margin simulations of LPDDR/LPDDR and other high-speed interfaces
• Responsible for the various interfaces in the product and verifying the simulations against measurements
• Update the SIPI design and analysis flow, including critical checklists.
Qualification and Experience:
• Minimum 7 years working experience on signal integrity and power integrity at system level of high-speed digital and RF systems.
• Solid understanding and experience in electromagnetics modeling and transmission line theory.
• Excellent experience in SIPI simulation of PCIe Gen4/5, DDR4/5, LPDDR4/5 etc.
• Proficiency in SIPI sim tools, such as HFSS, Q3D, ADS, HSPICE, PowerSI, PowerDC etc.
• Working experience in design tools such as Cadence Allegro and Spectre
• Hands-on experience in electrical/design validation/compliance testing using high speed scopes, TDR and VNA.
• Excellent written and oral communication skills
• Experience in RF system design (DAC and ADC) is a plus
• Experience in scripting Python is a plus
• People Management experience is a plus
Please get in touch. See my detail below:
LOCATION: Paris, France
SALARY: Negotiable
DURATION: Permanent
Job Description:
• Responsible for Signal Integrity and Power Integrity simulations at feasibility, floor planning, post-layout phases of the SoC/package/PCB. Establish design and layout guidelines.
• Responsible for coordinating with systems team, IC/HW design team and layout team to identify aggressor/victims, generate test plans and resolve SI related issues
• Responsible for coordinating with IC/HW design team to collect power consumptions, designing/simulating the PDN (Power Delivery Network)
• Responsible for SI and timing margin simulations of LPDDR/LPDDR and other high-speed interfaces
• Responsible for the various interfaces in the product and verifying the simulations against measurements
• Update the SIPI design and analysis flow, including critical checklists.
Qualification and Experience:
• Minimum 7 years working experience on signal integrity and power integrity at system level of high-speed digital and RF systems.
• Solid understanding and experience in electromagnetics modeling and transmission line theory.
• Excellent experience in SIPI simulation of PCIe Gen4/5, DDR4/5, LPDDR4/5 etc.
• Proficiency in SIPI sim tools, such as HFSS, Q3D, ADS, HSPICE, PowerSI, PowerDC etc.
• Working experience in design tools such as Cadence Allegro and Spectre
• Hands-on experience in electrical/design validation/compliance testing using high speed scopes, TDR and VNA.
• Excellent written and oral communication skills
• Experience in RF system design (DAC and ADC) is a plus
• Experience in scripting Python is a plus
• People Management experience is a plus
Please get in touch. See my detail below:
19003tux
| Commercial / Management / Executive: | Project / Program Management |
