Senior ASIC Design Engineer
Italy
On-Site, Hybrid, Remote
Permanent
Senior ASIC Design Engineer
Remote, Italy
My Client is looking for a Senior ASIC Design Engineer to join their hardware design team. In this key role, you will contribute to developing advanced AI-driven silicon solutions, ensuring optimal performance, power efficiency, and scalability.
Key Responsibilities
* Collaborate with cross-functional teams to define and implement complex design specifications.
* Architect and optimize micro-architectures for performance, power, and area (PPA).
* Conduct block/system-level RTL coding, integrating IPs/Sub IPs into the SoC.
* Perform static checks (lint, CDC, equivalence) and automate tasks for efficiency.
* Work with verification engineers to ensure design correctness through functional verification.
* Contribute to design reviews and collaborate with physical design engineers on DFM/DFT considerations.
Experienced required
* Advanced degree in Electrical Engineering, Computer Engineering, or a related field.
* Proven experience in silicon logical design, from concept to tapeout.
* Strong knowledge of ASIC RTL, SystemVerilog, synthesis, timing analysis, DFT, and SVA.
* Proficiency in EDA tools and scripting (Python, TCL) for automation.
* Excellent analytical, problem-solving, and debugging skills.
* Leadership: mentoring junior engineers and participating in interviews.
* Strong communication skills, including proactive collaboration in a remote, diverse environment.
Beneficial experience
* Knowledge of PCIe, UCIe, Ethernet, LPDDR5, LPDDR6 GDDR7 is useful but not essential.
Remote, Italy
My Client is looking for a Senior ASIC Design Engineer to join their hardware design team. In this key role, you will contribute to developing advanced AI-driven silicon solutions, ensuring optimal performance, power efficiency, and scalability.
Key Responsibilities
* Collaborate with cross-functional teams to define and implement complex design specifications.
* Architect and optimize micro-architectures for performance, power, and area (PPA).
* Conduct block/system-level RTL coding, integrating IPs/Sub IPs into the SoC.
* Perform static checks (lint, CDC, equivalence) and automate tasks for efficiency.
* Work with verification engineers to ensure design correctness through functional verification.
* Contribute to design reviews and collaborate with physical design engineers on DFM/DFT considerations.
Experienced required
* Advanced degree in Electrical Engineering, Computer Engineering, or a related field.
* Proven experience in silicon logical design, from concept to tapeout.
* Strong knowledge of ASIC RTL, SystemVerilog, synthesis, timing analysis, DFT, and SVA.
* Proficiency in EDA tools and scripting (Python, TCL) for automation.
* Excellent analytical, problem-solving, and debugging skills.
* Leadership: mentoring junior engineers and participating in interviews.
* Strong communication skills, including proactive collaboration in a remote, diverse environment.
Beneficial experience
* Knowledge of PCIe, UCIe, Ethernet, LPDDR5, LPDDR6 GDDR7 is useful but not essential.
19003U94
| Digital IC Design / Verification: | Digital IC Design |
