ASIC Design Manager
Italy
On-Site, Hybrid, Remote
Permanent
ASIC Design Manager
Remote / Flexible
My Client is seeking an ASIC Design Manager to lead a team in developing cutting-edge AI-driven silicon solutions. Reporting to the ASIC Director, you will drive the architecture, implementation, and optimization of advanced micro-architectures while ensuring top-tier performance, power efficiency, and scalability.
Key Responsibilities
* Lead and mentor a team of logical design engineers.
* Define and execute complex design specifications.
* Architect and optimize micro-architectures for performance, power, and area (PPA).
* Develop and integrate IPs/Sub IPs into top-level SoC.
* Conduct RTL coding, linting, CDC checks, synthesis, and timing analysis.
* Automate workflows with Python, TCL, and scripting tools.
* Collaborate with verification and physical design engineers to ensure DFM/DFT compliance.
Experience we are looking for:
> 10+ years in silicon logical design, from concept to tapeout.
> Expertise in SystemVerilog, synthesis, timing analysis, and verification methodologies.
> Proficiency in EDA tools and scripting (Python, TCL, etc.).
> Strong leadership, mentoring, and cross-functional collaboration skills.
> Excellent English communication for remote, global teamwork.
Would you like more information, please get in touch.
Remote / Flexible
My Client is seeking an ASIC Design Manager to lead a team in developing cutting-edge AI-driven silicon solutions. Reporting to the ASIC Director, you will drive the architecture, implementation, and optimization of advanced micro-architectures while ensuring top-tier performance, power efficiency, and scalability.
Key Responsibilities
* Lead and mentor a team of logical design engineers.
* Define and execute complex design specifications.
* Architect and optimize micro-architectures for performance, power, and area (PPA).
* Develop and integrate IPs/Sub IPs into top-level SoC.
* Conduct RTL coding, linting, CDC checks, synthesis, and timing analysis.
* Automate workflows with Python, TCL, and scripting tools.
* Collaborate with verification and physical design engineers to ensure DFM/DFT compliance.
Experience we are looking for:
> 10+ years in silicon logical design, from concept to tapeout.
> Expertise in SystemVerilog, synthesis, timing analysis, and verification methodologies.
> Proficiency in EDA tools and scripting (Python, TCL, etc.).
> Strong leadership, mentoring, and cross-functional collaboration skills.
> Excellent English communication for remote, global teamwork.
Would you like more information, please get in touch.
19003U93
| Commercial / Management / Executive: | Technical / Design Management |
