[CONTRACT] Digital Design Engineer
Germany - Munich
Contract
Job Description
Job Title: ASIC Design Engineer
Start Date: ASAP
Duration: 6 months initial
Job Type: Contract
Remote: 100% with potential occasional on-site travel
Description of Services:
Adaptation of an existing NVM RRAM module in order to realize new functionalities namely:
- Translation of VHDL (RTL) design into System Verilog
- Integration of new sequential ECC unit into Datapath
-Adaptation of FSMs for new access mode (direct/indirect write)
- Adaptation of existing FSMs like RRS for auto configuration
- Adaption of Data_prep/FSM for half/quarter word mode
- FPGA implementation tbd. - Implementation Verification using Spyglass - Setup and Execution of the Logic Synthesis including Constraints
Job Title: ASIC Design Engineer
Start Date: ASAP
Duration: 6 months initial
Job Type: Contract
Remote: 100% with potential occasional on-site travel
Description of Services:
Adaptation of an existing NVM RRAM module in order to realize new functionalities namely:
- Translation of VHDL (RTL) design into System Verilog
- Integration of new sequential ECC unit into Datapath
-Adaptation of FSMs for new access mode (direct/indirect write)
- Adaptation of existing FSMs like RRS for auto configuration
- Adaption of Data_prep/FSM for half/quarter word mode
- FPGA implementation tbd. - Implementation Verification using Spyglass - Setup and Execution of the Logic Synthesis including Constraints
19003U2Q
| Digital IC Design / Verification: | Digital IC Design |
