Digital Verification Technical Leader (W/M)
France
Permanent
We have had an exciting opportunity become available in France for a Digital Verification Technical Leader (W/M)
ROLE: Digital Verification Technical Leader (W/M)
LOCATION: Paris-Caen-Grenoble. Full Remote possible on conditions
DURATION: Permanent
SALARY: Negotiable
About the company:
Our verification team is seeking a dynamic and experienced Verification Engineer who will actively
contribute to the chip/block level digital verifications. In this role, the candidate will technically drive
verification strategy and execution of state-of-the-art SoCs and will be in close collaboration with digital
and mixed-signal IC design engineers.
Job Summary:
• Technically lead the verification team to successfully verify state-of-the-art ASICs.
• Participate in defining and implementing IC verification methodologies
• Participate, in close collaboration with other technical leaders, to the IC verification strategy
• Lead Subsystems and Top-Level verification plans activities and execution
• Participate in writing subsystems and top-level self-checking test benches & testcases.
• Participate in designing and improving Verification IPs.
• Actively support the Analog Mixed Signal team for mixed signal simulations.
• Support the Silicon Validation team for the evaluation of the manufactured ASIC
• Participate to the test procedures following company QA policy.
Responsibilities:
• You have a solid background in digital electronic and signal processing
• You are a specialist in SystemVerilog/UVM, with many years of coding and verification
experience
• You have a solid background in scripting languages (TCL, Python, Makefile, etc.)
• You perfectly understand the full ASIC flow and have a previous significative experience in GateLevel Simulation and/or DFT
• A previous experience in verification of CPUs (ARM, RISC V) and C-oriented testing is a plus
• A previous experience in the verification of Interfaces such as PCIe, Ethernet, and DRAM is a plus
• A previous experience in verification of digital functions for Mixed-Signal ICs such as A/D
Converters, D/A Converters, and/or RF transceivers is a plus
• A previous experience with Cadence or Synopsys Simulation/Emulation flow is a plus
• A previous experience in Formal Verification is a plus
• You are creative and proactive
• You demonstrate very good analytical and problem-solving skills
• You communicate fluently in English (oral and written)
Required experience:
• You have a MSc or PhD in Electrical Engineering or equivalent and 10+ years of hands-on
experience in chip-level and circuit-level Verification
If you could be suitable for this position, please get in touch. See my details below:
ROLE: Digital Verification Technical Leader (W/M)
LOCATION: Paris-Caen-Grenoble. Full Remote possible on conditions
DURATION: Permanent
SALARY: Negotiable
About the company:
Our verification team is seeking a dynamic and experienced Verification Engineer who will actively
contribute to the chip/block level digital verifications. In this role, the candidate will technically drive
verification strategy and execution of state-of-the-art SoCs and will be in close collaboration with digital
and mixed-signal IC design engineers.
Job Summary:
• Technically lead the verification team to successfully verify state-of-the-art ASICs.
• Participate in defining and implementing IC verification methodologies
• Participate, in close collaboration with other technical leaders, to the IC verification strategy
• Lead Subsystems and Top-Level verification plans activities and execution
• Participate in writing subsystems and top-level self-checking test benches & testcases.
• Participate in designing and improving Verification IPs.
• Actively support the Analog Mixed Signal team for mixed signal simulations.
• Support the Silicon Validation team for the evaluation of the manufactured ASIC
• Participate to the test procedures following company QA policy.
Responsibilities:
• You have a solid background in digital electronic and signal processing
• You are a specialist in SystemVerilog/UVM, with many years of coding and verification
experience
• You have a solid background in scripting languages (TCL, Python, Makefile, etc.)
• You perfectly understand the full ASIC flow and have a previous significative experience in GateLevel Simulation and/or DFT
• A previous experience in verification of CPUs (ARM, RISC V) and C-oriented testing is a plus
• A previous experience in the verification of Interfaces such as PCIe, Ethernet, and DRAM is a plus
• A previous experience in verification of digital functions for Mixed-Signal ICs such as A/D
Converters, D/A Converters, and/or RF transceivers is a plus
• A previous experience with Cadence or Synopsys Simulation/Emulation flow is a plus
• A previous experience in Formal Verification is a plus
• You are creative and proactive
• You demonstrate very good analytical and problem-solving skills
• You communicate fluently in English (oral and written)
Required experience:
• You have a MSc or PhD in Electrical Engineering or equivalent and 10+ years of hands-on
experience in chip-level and circuit-level Verification
If you could be suitable for this position, please get in touch. See my details below:
19003U12
| Digital IC Design / Verification: | DFT (Design-for-Test) |
